Electromigration (EM) in solder joints under high current density has become a critical reliability issue for the future high density microelectronic packaging. This paper presents a prediction method for electromigration (EM) induced void generation of solder joint in a wafer level Chip Scale Package (WL-CSP) structure. The driving force for electromigration induced failure considered here includes the electron wind force, stress gradients, temperature gradients, as well as the atomic density gradient. To understand impact of the under ball metallurgy (UBM) geometry and solder bump shape on electromigration reliability, the EM simulation for WL-CSP structure is performed to get time to failure (TTF) based on the full factorial design of experiments (DOE) by using 3D finite element analysis. The analysis of the impact of under ball metallurgy and solder bump geometry on the void generation and TTF is presented.