Shift-in power is one of the main elements of the test dynamic power for integrated circuits testing. The paper proposes a low power test scheme for broadcast scan architecture to reduce shift-in dissipation. Unlike conventional broadcast scan, the proposed scheme divides multiple scan chains into several scan chain segments, and only the first internal scan chain is fed directly by the scan Input SI, and used as the path of shifting test data for all the scan chain segments. Thus, only one scan chain is activated when test data shifting in, the test data shift-in power could be reduced effectively. To further reduce test shift-in power, the scan cell reordering which put the similar scan cells in adjacent positions for each two adjacent segments are also used in this paper. The theoretical and the experimental results illustrate that the proposed scheme could reduce dynamic power dissipation during scan testing significantly.